| [Home] | [Products] | [HowItWorks] |
Table of contents for the Parallel ATA (PATA and PATAPI) pages:
An ATA device is a mass storage device that stores data in 512-byte chunks called sectors. These sectors are transferred to/from the device in contiguous blocks of data that are a multiple of 512 bytes. Each sector stored by a device has a unique sector address that is called a Logical Block Address (LBA). The first sector on a device is at LBA 0, the next at LBA 1, etc.
Note that some new ATA device are allowed to have sector sizes other than 512 bytes but these device are used only in very special and proprietary systems.
An ATAPI device is really a SCSI device that uses the ATA interface. ATA/ATAPI is one of many SCSI physical interfaces. ATA/ATAPI is probably the most simple of all the SCSI physical interfaces. An ATAPI device must implement all the ATA signals and most of the ATA command protocols but an ATAPI device uses SCSI commands. Unlike ATA, ATAPI devices (SCSI devices) can store data in a variety of formats and block sizes - such as 512 bytes used by many SCSI disk drives, 2048 bytes used for CD/DVD data and 2352 bytes used by CD-DA (digital audio) data (music). Many SCSI commands, such as Request Sense, transfer only a few bytes of data.
An ATA/ATAPI interface can support one or two devices. The devices can ATA or ATAPI or both.
Parallel ATA (PATA) is based on the original IBM PC ISA bus. Basic PATA uses 5 address signals, two read/write signals, a 16-bit bidirectional data bus and an interrupt signal. These signals are used to access two blocks of 8-bit registers and one 16-bit register in the ATA or ATAPI device. These registers are used to send commands to a device, to receive status from the device and to transfer data in what is called PIO mode.
Most PATA implementations also support a data transfer mode called DMA. DMA requires two additional signals. There are two DMA protocols: the old ISA MultiWord (MW) DMA and the newer UltraDMA. Many years ago there was also a very slow Single Word DMA protocol.
There are some additional PATA signals that we can avoid talking about for now.
Normally the PATA signals are used across a 40-wire or 80-wire PATA cable. But PCMCIA PC Card ATA or Compact Flash is another popular interface used by ATA devices.
The rules for accessing the registers in an ATA or ATAPI devices are defined at two levels: 1) at the hardware level a device must implement the register access rules defined by ATA/ATAPI-x, and 2) a host must follow the register access rules defined by the command protocols - also defined by ATA/ATAPI-x.
PCMCIA PC Card ATA and Compact Flash (CF) devices are generally solid state disk drives using flash memory technology. However, there are some very small disk drives, such as the IBM/HGST MicroDrive, that use the PC Card ATA or CF interface. The PC Card ATA and CF interfaces are basically a variation of PATA. PC Card ATA and CF adds several additional signals to allow access to other PCMCIA specific data in the device.
Pure PCMCIA PC Card ATA devices only operate in the PCMCIA defined interface modes. But a CF supports both the PCMCIA PC Card ATA and TrueIDE (TrueATA) interface modes. In TrueIDE (TrueATA) mode a CF can be plugged onto a normal 40-wire or 80-wire PATA cable with another ATA or ATAPI device.
The following diagram shows the two most common implementations of PATA. PCMCIA PC Card ATA and CF are very similar to PATA as will be described later in this document.
The PATA interface is defined by the ATA/ATAPI-x standards published by T13. Use the ATA/ATAPI-4 or -5 or -6 documents. Avoid using the ATA/ATAPI-7 document unless you need information about a specific ATA/ATAPI-7 feature. A PATA interface must conform to the signal usage and signal timing found in these T13 documents.
Use the PCMCIA and/or Compact Flash (CFA) documents for the signal usage and signal timing of the PCMCIA PC Card ATA and/or Compact Flash (CF) interface.
More info here soon, such as a description of all the signals and how to use them in traditional and embedded products.
Page updated 28 Dec 2005.